趋近智
APX AI
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趋近智
Estimating the exact number of GPUs required for a production workload means translating abstract business requirements into physical hardware constraints. An engineering team needs to know exactly how many A100 80GB or RTX 4090 24GB cards must be provisioned to support a specific model at a target concurrent user load. This calculation relies on three primary variables: the static memory footprint of the model weights, the dynamic memory consumed by the KV cache during peak concurrent requests, and the throughput needed to satisfy overall query volume. If you miscalculate the memory boundaries, the deployment will either fail with Out-Of-Memory errors or suffer severe latency degradation from offloading to slower host RAM.
The foundation of your capacity plan begins with the static memory footprint. This is the minimum VRAM required simply to load the model onto the device before any inference occurs. The equation scales directly with the parameter count and the numeric precision format chosen for deployment.
Modern deployment environments generally utilize FP16 or BF16 formats, which consume 2.0 bytes per parameter. Hardware-aware quantization techniques reduce this footprint. Using FP8 precision reduces the requirement to 1.0 byte per parameter, and INT4 formats like GGUF drop the requirement to approximately 0.5 bytes per parameter, plus minor overheads for scaling constants.
For a dense 8B model like meta-llama/Meta-Llama-3.1-8B, the static weight footprints are:
For a 70B architecture like meta-llama/Meta-Llama-3.1-70B-Instruct, the BF16 footprint is approximately 140 GB. This immediately dictates that the model cannot fit on a single enterprise accelerator. An A100 or H100 provides 80GB of memory, forcing a distributed setup using at least two GPUs just to hold the static parameters.
Mixture of Experts architectures change this dynamic slightly. For mistralai/Mixtral-8x7B-Instruct-v0.1, the model contains 46.7 billion total parameters. Even though only a subset of these parameters are active for any given token forward pass, the entire 46.7 billion parameter set must reside in memory. At BF16 precision, the static footprint is roughly 93.4 GB.
Once the model is loaded, VRAM must accommodate the execution context. This includes a fixed 1 to 2 GB overhead for the CUDA runtime context and dynamic allocations for forward pass activations. The most significant variable memory consumer is the KV cache, which stores past attention states to prevent recalculating them during the autoregressive decode phase.
The size of the KV cache scales linearly with sequence length and batch size. You can calculate the exact bytes required for the KV cache using the following equation.
Let us calculate the KV cache requirements for meta-llama/Meta-Llama-3.1-8B operating in BF16 precision. The model architecture specifies 32 layers, 8 KV heads, and a head dimension of 128.
First, calculate the memory required for a single token in the batch.
Next, scale this up for a production scenario serving a batch size of 16 with an 8,192 token context limit.
When sizing physical hardware, you must add the static weights, the maximum KV cache, and the CUDA overhead together.
For the 8B model at batch 16 and 8k context: 16.0 GB (Weights) + 17.18 GB (KV Cache) + 2 GB (Overhead) = 35.18 GB.
This calculation reveals a significant infrastructure constraint. Despite being a small 8B model, running this specific workload at BF16 precision will trigger an Out-Of-Memory error on a standard RTX 3090 or RTX 4090 24GB GPU. The operator is forced to either split the model across two 24GB GPUs using Tensor Parallelism, reduce the batch size to 4, or apply KV cache quantization to compress the 17.18 GB cache footprint down to 8.5 GB using FP8.
Total VRAM aggregation stacking static parameter footprints with dynamic scaling variables.
When deploying massive models like meta-llama/Meta-Llama-3.1-70B-Instruct, you must translate the total calculated memory into discrete hardware units.
The 70B model features 80 layers, 8 KV heads, and a head dimension of 128. Using the exact same equation above, a single token consumes 327,680 bytes. If you design the system for a batch size of 16 and an 8,192 context window, the KV cache requires 42.9 GB of VRAM.
To serve this model on enterprise hardware, you divide the total required memory by the per-device capacity. Using A100 80GB accelerators, . You physically need at least 3 GPUs to hold the data. However, Tensor Parallelism shards attention heads and matrix multiplications across devices. To ensure balanced matrix dimensions and optimize collective communications over the NVLink interconnect, Tensor Parallelism is almost always deployed in powers of 2. Therefore, this deployment requires 4x A100 80GB GPUs.
For operators utilizing Apple Silicon, unified memory changes the topology. An Apple Mac Studio equipped with an M2 Ultra and 192GB of unified memory can hold the entire 188.1 GB footprint in a single memory space. This eliminates the need for Tensor Parallelism and NVLink overheads, though the aggregate memory bandwidth of the M2 Ultra (800 GB/s) will yield significantly lower generation speeds during the decode phase compared to 4x A100s operating in parallel (which offer an aggregate bandwidth of over 6,000 GB/s).
Calculating VRAM ensures a single replica of your model will function without crashing. The final step is scaling that replica count to meet SLA throughput targets. If your deployment requires serving 500 Queries Per Second and a single 4-GPU replica caps out at a maximum concurrency of 16 requests before TPOT latency degrades below acceptable thresholds, you must scale horizontally.
The formula for total cluster size is straightforward once the per-replica GPU count is fixed.
If you need to support 64 concurrent streams and one replica supports 16, you need replicas. If the model requires a 4x A100 80GB setup per replica, your total physical provisioning requirement is individual A100 80GB GPUs configured into four isolated endpoints.
Locking in the exact VRAM envelope with tensor parallelism and memory utilization bounds ensures the cluster stays within hardware limits:
from vllm import LLM, SamplingParams
# Configure the LLM engine to strictly enforce capacity limits.
# The Qwen2.5-32B model at BF16 requires ~64GB just for weights.
# Deploying across 4x RTX 4090 (24GB) or 2x A100 (80GB) cards.
llm = LLM(
model="Qwen/Qwen2.5-32B",
tensor_parallel_size=4, # Enforce sharding across 4 physical GPUs
gpu_memory_utilization=0.90, # Reserve exactly 90% of VRAM, leaving 10% for OS/CUDA
max_model_len=8192, # Hard cap on the KV cache sequence dimension
enforce_eager=True # Disable CUDA graph capture to save memory buffers
)
# Define generation constraints
sampling_params = SamplingParams(temperature=0.7, max_tokens=1024)
# Execute a test prompt to initialize the KV cache allocation
prompts = ["Explain the architecture of High Bandwidth Memory."]
outputs = llm.generate(prompts, sampling_params)
for output in outputs:
print(output.outputs[0].text)
Running this initialization logic in a staging environment allows you to watch the actual memory allocations match your sizing calculations, providing an exact capacity baseline before production traffic hits the cluster.
魏明 (Wei-Ming Thor)
• 创始人与工程师, ApX Machine Learning
专注于大语言模型架构分析与硬件容量规划,维护 ApX VRAM 计算器。
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